Unified cryptographic coprocessor architecture for post-quantum cryptography in 6G network equipment
DOI:
https://doi.org/10.30837/rt.2025.4.223.13Keywords:
post-quantum cryptography, ML-KEM, ML-DSA, NTT, FPGA, 6G networks, hardware acceleration, unified architecture, URLLC, lattice-based cryptographyAbstract
The advent of quantum computing poses significant threats to current cryptographic infrastructure protecting 5G and emerging 6G networks. In August 2024, the National Institute of Standards and Technology (NIST) published the first post-quantum cryptography (PQC) standards: ML-KEM (FIPS 203) for key encapsulation and ML-DSA (FIPS 204) for digital signatures. Real-world security protocols such as TLS 1.3 and IPsec require both operations simultaneously, necessitating efficient unified hardware implementations. This paper presents a novel unified cryptographic coprocessor architecture (UniPQC) supporting both ML-KEM and ML-DSA algorithms for deployment in 6G network equipment. The proposed architecture leverages the shared mathematical foundation of both algorithms, specifically the Number Theoretic Transform (NTT), to achieve significant resource optimization. We implement a configurable NTT engine with shared butterfly units capable of processing both 256-coefficient polynomials for ML-KEM and ML-DSA with different moduli (q=3329 and q=8380417). The architecture includes: Unified Polynomial Arithmetic Module (UniPAM), Hash and Sampling Unit (HSU) with Keccak-f[1600] core, Memory Management Unit (MMU) with conflict-free addressing, and Control Configuration Logic (CCL). The architecture is implemented on Xilinx Zynq UltraScale+ FPGA, achieving 285 MHz operating frequency with 4,512 LUTs, 3,245 FFs, 24 DSPs, and 8 BRAMs. Performance evaluation demonstrates that the unified design reduces area-time product by 34% compared to separate implementations while meeting the latency requirements for 6G Ultra-Reliable Low-Latency Communication (URLLC) applications. Complete TLS 1.3 handshake is achieved in under 300 μs, with power consumption of 245 mW for ML-KEM and 312 mW for ML-DSA operations.
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